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Title: 具輸入雜訊抑制之電壓峰值檢知器 PEAK VOLTAGE DETECTOR WITH INPUT NOISE INHIBITION
Authors: 蕭明椿
Contributors: 修平技術學院
Date: 2004-11-21
Issue Date: 2008-11-06T08:23:33Z
Abstract: 本創作提出一種具輸入雜訊抑制之電壓峰值檢知器,其係由一低通濾波器1、一差動放大器2、一控制電晶體3、一電流鏡4以及一電容器C所組成,其中,該低通濾波器1係用以濾除來自輸入端之雜訊,該差動放大器2係做為比較器使用,其兩輸入端係分別接受低通濾波器1之輸出信號及檢知器之輸出電壓回授信號V(OUT),並提供適當之充電電流給電流鏡4,以便取得輸入電壓波形之峰值做為輸出電壓信號,該控制電晶體3係連接在電源電壓與差動放大器2之間,以及電源電壓與電流鏡4之間,以便於待機時,可阻斷差動放大器2與電流鏡4之電流,而該電流鏡4係做為充電器使用,用以提供電容器C所需之充電電流。本創作所提出之電壓峰值檢知器,不但能精確地檢測出輸入信號之峰值電壓,並且也能有效地濾除來自輸入端之雜訊,同時亦可減少功率消耗。
Appears in Collections:[Department of Electrical Engineering & Graduate Institute] Patents

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